diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 41e4a6e..78b7369 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -98,7 +98,6 @@
 #define CONFIG_SYS_PCIE1_ADDR		(CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index ddfe7aa..15bfeef 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -149,8 +149,6 @@
 #define CONFIG_SYS_DDR_ERR_DIS		0x00000000
 #define CONFIG_SYS_DDR_SBE		0x00FF0000
 
-#define CONFIG_SYS_DDR_TLB_START 9
-
 /*
  * Memory map
  *
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index df9ab34..f4509bd 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -101,7 +101,6 @@
 #define CONFIG_SYS_PCIE1_ADDR		(CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR3		1
 #undef CONFIG_FSL_DDR_INTERACTIVE